Samsung reveals more details on how it plans to produce a QLC NAND chip with 1,000 layers essential for a Petabyte SSD – Hafnia ferroelectric components identified as key ingredient to increase layer count above 1K

It’s no secret that the race to produce the first 1000TB SSD is on. At Tech Day 2022, Samsung unveiled ambitious plans to “stack more than 1,000 layers” in its most advanced NAND chip by 2030, meaning a petabyte SSD could arrive by then.

Last year the company said it might be able to deliver it much sooner, but that appears to have been wishful thinking on behalf of the technology industry.

That said, the company is clearly going full steam ahead in developing future NAND chips. The South Korean electronics giant recently announced that it will soon begin mass production of its latest ninth-generation 290-layer vertical (V9) NAND chips, and is widely expected to follow up with a stunning 430-layer tenth-generation ( Q10) NAND chip will reveal. year.

Hafnia Ferroelectricity

So while we don’t know much about what’s happening behind the scenes in the company’s quest to produce the first Petabyte SSD, some clues have emerged online.

At this year’s VLSI Technology Symposium in Honolulu there will be one Technical session presented by Giwuk Kim, a PhD student at the Department of Electrical Engineering of Korea Advanced Institute of Science and Technology (KAIST). His research interests include Hafnia-based FE-NAND memory, FeRAM and in-memory computing applications, and this will be the focus of the session, entitled “In-depth analysis of the Hafnia Ferroelectrics as a key enabler for low-voltage systems”. & QLC 3D VNAND Beyond 1K Layer experimental demonstration and modeling.”

The summary of the work, which – spoiler alert – was co-authored by Samsung Electronics, reads as follows: “We experimentally demonstrate a remarkable performance improvement enhanced by the interaction of charge trapping and ferroelectric (FE) switching effects in metal band engineered gate interlayer (BE -G.IL)-FE channel interlayer (Ch.IL)-Si (MIFIS) FeFET. The MIFIS with BE-G.IL (BE-MIFIS) facilitates the maximum ‘positive feedback’ (Posi. FB.) of double effects, leading to a low operating voltage (VPGM/VERS: +17/-15 V), a wide memory window (MW: 10.5 V) and negligible distortion at 9 V bias. Moreover, our proposed model verifies that the performance improvement of the BE-MIFIS FeFET is attributed to the intensified posi. FB. This work proves that the Hafnia FE can play a key role in expanding the technological development of 3D VNAND, which is currently approaching a state of stagnation.”

Exactly what role Samsung will play in the demonstration (if any) is not known at this time, but the company is not alone in exploring the potential of Hafnia ferroelectric systems. Giwuk Kim’s lecture is part of a parent session at the symposium entitled “Non-Volatile Memory Technology – Hafnia Based Ferroelectrics-1”, which will be chaired by Deoksin Kil, head of materials development at Samsung’s archrival SK hynix.

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