Samsung may have accidentally revealed that it is developing a RISC-V CPU/accelerator.
The error occurred during a session titled “Unlocking the Next 35 Years of Software for HPC and AI” at the recent ISC conference, where a slide on the UXL Foundation (Unified Acceleration Foundation) presented a “RISC-V CPU/AI -accelerator’ mentioned. from Samsung.”
This has led to speculation about the South Korean tech giant’s plans to integrate the RISC-V architecture into its upcoming technologies, especially its Mach-1 AI accelerator chip, which is expected to arrive in early 2025.
Not really the first mention
Samsung is a steering member of the UXL Foundation, as are Arm, Qualcomm, Intel and Google Cloud. UXL develops software aimed at improving AI accelerators that do not use Nvidia’s GPUs – an alternative to Nvidia’s CUDA.
The Mach-1 is said to be a “lightweight” AI chip that uses low-power (LP) memory instead of the expensive HBM typically used in AI semiconductors. Naver, the South Korean equivalent of Google, has signed a deal worth 1 trillion won ($750 million) with Samsung for Mach-1 chips.
RISC-V, an open-standard instruction set architecture, is rapidly gaining ground because it allows any developer to build their own processors without expensive licensing fees. Details about the capabilities of Samsung’s RISC-V CPU remain scarce, but HPC wire speculates that the CPU “could be a low-performance RISC-V processor in Samsung’s memory-based chip to perform specific tasks defined by software kit functions.” That would fit with what we know about the Mach-1 and make sense since RISC-V doesn’t offer the same performance as Intel’s x86 chips.
A number of hardware manufacturers, including Apple and Nvidia, are already using RISC-V microcontrollers in their products, and countries such as Europe, China and Russia are developing their own sovereign chips based on RISC-V CPUs as part of a broad industry trend towards diversification and independence from proprietary technologies.
A little digging reveals that Samsung has hinted at the existence of a RISC-V CPU/accelerator before. In a Linux Foundation webinar a month ago, again on the UXL Foundation, it appeared in a slide there as well.