MIT researchers say 3D nanoscale transistors made from ultra-thin semiconductor materials promise more efficient electronics; Quantum mechanics offers a path beyond the limits of silicon


  • MIT makes nanoscale transistors for efficient electronics
  • Quantum tunneling delivers high performance at low voltage
  • The technology has the potential to replace silicon

MIT researchers have developed a nanoscale transistor that could potentially pave the way for electronics that are more efficient than silicon-based devices.

Traditional silicon transistors, crucial in most electronic devices, face a physical limitation known as ‘Boltzmann tyranny’ that prevents them from operating under a certain voltage.

This limitation limits energy efficiency, especially as modern applications such as AI push for faster and more powerful computations.

Nanowire heterostructures

To address these limitations, the MIT team created a new three-dimensional transistor using ultrathin semiconductor materials including gallium antimonide and indium arsenide.

The design uses a quantum mechanical phenomenon known as quantum tunneling, which allows electrons to travel through an energy barrier instead of over it. This structure, consisting of vertical nanowires just a few nanometers wide, allows these transistors to operate at much lower voltages, while maintaining performance comparable to that of state-of-the-art silicon transistors.

“This is a technology with the potential to replace silicon, so you could use it with all the functions that silicon currently has, but with much better energy efficiency,” said Yanjie Shao, an MIT postdoc and lead author of the paper. research. MIT News. By relying on tunnel transistors, the device achieves a sharp transition between “off” and “on” states at a lower voltage, something silicon transistors cannot do as efficiently.

The transistors are designed using quantum confinement, which controls electrons within a small space, increasing their ability to tunnel through barriers. MIT’s advanced facility, MIT.nano, allowed researchers to create the precise 3D geometry needed for this effect, creating vertical nanowire heterostructures with diameters as small as 6 nanometers, the smallest 3D transistors yet have been reported so far.

“We have a lot of flexibility to design these material heterostructures, so we can achieve a very thin tunnel barrier, which allows us to obtain very high current,” Shao explains. This design supports a steep switching ramp, allowing the device to operate below the voltage limit of conventional silicon.

According to Jesús del Alamo, senior author and Donner Professor of Engineering: “Conventional physics can only go so far. Yanjie’s work shows that we can do better than that, but we have to use different physics. There are still many challenges to overcome before this approach can become commercial in the future, but conceptually it is a real breakthrough.”

The research team, consisting of MIT professors Ju Li, Marco Pala and David Esseni, has now shifted focus to improving manufacturing methods for greater uniformity between chips. Small inconsistencies, even at the nanometer level, can affect device performance. Therefore, they are investigating alternative vertical designs that can improve consistency. The study, published in Natural electronicswas funded in part by Intel Corporation and reflects the industry’s interest in exploring solutions beyond traditional silicon technology.

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