Chip company founded by ex-Intel president plans massive 256-core CPU to ride AI inference wave and give Nvidia B100 a run for its money – Ampere Computing AmpereOne-3 likely to support PCIe 6.0 and DDR5 technology
Ampere Computing unveiled its AmpereOne family of processors last year, featuring a whopping 192 single-threaded Ampere cores, the highest in the industry.
Designed for cloud efficiency and performance, these chips were Ampere’s first product based on the new custom core using internal IP, which CEO Renée James said signaled a shift in the industry.
At the time of the launch, James said: “Every few decades of computing, a driving application or performance use case has emerged that sets a new bar for what performance is required. Today’s driving applications are AI and connected everything combined with our constant use and desire for streaming media. We cannot continue to use energy as a benchmark for performance in the data center. At Ampere, we design our products to maximize performance in a sustainable way so that we can continue to drive the future of the industry. “
AmpereOne-3 on the way
Jeff Wittich, chief product officer at Ampere, recently spoke with The next platform about future generations of AmpereOne. He told the site that an updated chip, with 12 memory channels and an A2 core with improved performance, would arrive later this year, in line with the company’s roadmap. This chip, which The Next Platform calls AmpereOne-2, will reportedly feature a 33 percent increase in DDR5 memory controllers and up to 50 percent more memory bandwidth.
But what happens next, sometime in 2025, sounds most exciting.
The next platform says the third-generation chip, AmpereOne-3 as he calls it, will have 256 cores and will be “etched in TSMC’s 3 nanometer (3N to be precise) processes.” It will use a custom A2+ core with a “two-chiplet design on the cores, with 128 cores per chiplet. It could be a four-chip design, with 64 cores per chiplet.”
The site expects the AmpereOne-3 to support PCI-Express 6.0 I/O controllers and perhaps have a dozen DDR5 memory controllers, although there is some speculation here.
“We’re moving pretty fast in terms of computing power,” Wittich told the site. “There’s a lot of other cloud features in this design – things around performance management to get the most out of all those cores. In each of the chip releases we will be making what are generally considered generational changes to the CPU core. In every generation we add a lot. So you’ll see much more performance, much more efficiency, and many more features, such as security improvements, all happening at the microarchitecture level. But we’ve put a lot of effort into making sure you get excellent performance consistency across all AmpereOnes. We’re also taking a chiplet approach with this 256-core design, which is another step. Chiplets are a pretty big part of our overall strategy.”
The AmpereOne-3 is reportedly currently being etched at TSMC ahead of its launch next year.